A transient pulse dually filterable and online self-recoverable latch

Latch Design for Transient Pulse Tolerance

Previous work on radiation hardening has focused on designing memory elements to tolerate direct hits by high energy particles. The study of latch designs to tolerate high energy particle induced transient pulses arising in the combinational part of the circuit and traveling to the inputs of DFFs has been ignored. In this work, we look at ways to slow down the input stage of latches by insertin...

Latch up effect under electromagnetic pulse

The physics of CMOS Latch-Up (latchup) under high power microwave radiation is discussed.

Novel Transient Fault Hardened Static Latch

In this paper we analyze the effects of transient faults (TFs) affecting the internal nodes of conventional latch structures and we propose a new latch design which allows to tolerate such faults. In particular, we show that standard latches using back-to-back inverters for their positive feedback are very susceptible to glitches on their internal nodes. We propose a new latch that is hardened ...

Filterable Viruses

Self-timed and speed independent latch circuits

Several designs of self-timed (some of which speed independent) latch circuits are presented. These are used in the speed independent (SI) implementation of two consecutive binary assignment statements. Issues such as logic reduction, utilisation of well known, simple components, and response speed improvement are dealt with in detail. The techniques employed can be used in designing other asyn...